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APT12M80B APT12M80S
800V, 13A, 0.80 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
TO -2 47
D3PAK
APT12M80B
APT12M80S
D
Single die MOSFET
G S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 13 8 45 30 525 6
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) 0.22 Package Weight 6.2 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 MicrosemiWebsite-http://www.microsemi.com N*m -55 0.11 150 C 300 oz g in*lbf
04-2009 050-8114 Rev B
Min
Typ
Max 335 0.37
Unit W C/W
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 6A VGS = VDS, ID = 1mA VDS = 800V VGS = 0V TJ = 25C TJ = 125C
APT12M80B_S
Typ 0.87 0.55 4 -10 Max Unit V V/C V mV/C A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 800
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
0.80 5 100 500 100
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 6A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 11 2470 42 245 115
Max
Unit S
pF
VGS = 0V, VDS = 0V to 533V
5
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 6A, VDS = 400V Resistive Switching VDD = 533V, ID = 6A RG = 4.7 6 , VGG = 15V
60 80 13 41 14 20 60 18
nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 13
Unit
G S
A 45 1.0 840 14 10 V ns C V/ns
ISD = 6A, TJ = 25C, VGS = 0V ISD = 6A, VDD = 100V 3 diSD/dt = 100A/s, TJ = 25C ISD 6A, di/dt 1000A/s, VDD = 533V, TJ = 125C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 29.17mH, RG = 10, IAS = 6A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = 7.84E-9/VDS^2 + 1.01E-8/VDS + 3.88E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein. Rev B 050-8114
04-2009
APT12M80B_S
30
V
GS
16
= 10V T = 125C
TJ = -55C
J
V V
25 ID, DRAIN CURRENT (A)
TJ = 25C
14
GS
GS
= 10, & 15V
= 6, & 6.5V 5.5V
20
ID, DRIAN CURRENT (A)
12 10 8 6 4 2
15
10
TJ = 125C
5V
5
TJ = 150C
4.5V 4V
0
0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
0
0
5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
3.0
NORMALIZED TO VGS = 10V @ 6A
45
VDS> ID(ON) x RDS(ON) MAX.
40 ID, DRAIN CURRENT (A) 35 30 25 20 15 10 5
2.5
250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
2.0
1.5
TJ = -55C
1.0
TJ = 25C
0.5 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 18 16
TJ = -55C TJ = 125C
0
0
1 2 3 4 5 6 7 8 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics
4,000 1,000 C, CAPACITANCE (pF) Ciss
gfs, TRANSCONDUCTANCE
14 12 10 8 6 4 2 0 0 4 6 8 10 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
ID = 6A
TJ = 25C TJ = 125C
100
Coss
10
Crss
2
12
100 200 300 400 500 600 700 800 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 45 ISD, REVERSE DRAIN CURRENT (A) 40 35 30 25
TJ = 25C
1
0
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12
VDS = 160V
10
VDS = 400V
8 6
VDS = 640V
20 15 10 5 0 0.3 0.6 0.9 1.2 1.5 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 04-2009 050-8114 Rev B
TJ = 150C
4 2 20 40 60 80 100 120 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0
APT12M80B_S
100 100
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
IDM
IDM
10
13s Rds(on) 100s 1ms 10ms 100ms TJ = 125C TC = 75C DC line
10
Rds(on) 13s 100s 1ms 10ms 100ms DC line
1
1
TJ = 150C TC = 25C
Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
0.1
1
10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
C
10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area
1
0.40 0.35 0.30 0.7 0.25 0.20 0.15 0.3 0.10 SINGLE PULSE 0.05 0 10
-5
ZJC, THERMAL IMPEDANCE (C/W)
D = 0.9
0.5
Note:
PDM
t1 t2
t1 = Pulse Duration Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t
0.1 0.05 10-4
10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
TO-247 (B) Package Outline
e3 100% Sn Plated
15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244)
D3PAK Package Outline
Drain (Heat Sink)
4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) 13.41 (.528) 13.51(.532)
4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 6.15 (.242) BSC
1.04 (.041) 1.15(.045)
Drain
20.80 (.819) 21.46 (.845) 3.50 (.138) 3.81 (.150)
Revised 4/18/95
13.79 (.543) 13.99(.551)
Revised 8/29/97
11.51 (.453) 11.61 (.457)
0.46 (.018) 0.56 (.022) {3 Plcs}
04-2009
4.50 (.177) Max. 0.40 (.016) 0.79 (.031)
2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084)
0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112)
1.27 (.050) 1.40 (.055) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs.}
19.81 (.780) 20.32 (.800) 1.01 (.040) 1.40 (.055)
1.22 (.048) 1.32 (.052)
3.81 (.150) 4.06 (.160) (Base of Lead)
Rev B
Gate Drain Source
Heat Sink (Drain) and Leads are Plated
2.21 (.087) 2.59 (.102)
050-8114
5.45 (.215) BSC 2-Plcs.
Dimensions in Millimeters and (Inches)
Source Drain Gate Dimensions in Millimeters (Inches)
Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.

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